1From 40f27132eedbe661d2fc732ef2e6e6d31d9e99be Mon Sep 17 00:00:00 20012From: Mingcong Bai <jeffbai@aosc.io>3Date: Fri, 13 Jun 2025 09:11:29 +08004Subject: [PATCH 1/6] drm/xe/bo: fix alignment with non-4KiB kernel page sizes56The bo/ttm interfaces with kernel memory mapping from dedicated GPU7memory. It is not correct to assume that SZ_4K would suffice for page8alignment as there are a few hardware platforms that commonly uses non-94KiB pages - for instance, 16KiB is the most commonly used kernel page10size used on Loongson devices (of the LoongArch architecture).1112Per our testing, Intel Xe/Alchemist/Battlemage families of GPUs works on13Loongson platforms so long as "Above 4G Decoding" was enabled and14"Resizable BAR" was set to auto in the UEFI firmware settings.1516Without this fix, the kernel will hang at a kernel BUG():1718[ 7.425445] ------------[ cut here ]------------19[ 7.430032] kernel BUG at drivers/gpu/drm/drm_gem.c:181!20[ 7.435330] Oops - BUG[#1]:21[ 7.438099] CPU: 0 UID: 0 PID: 102 Comm: kworker/0:4 Tainted: G E 6.13.3-aosc-main-00336-g60829239b300-dirty #322[ 7.449511] Tainted: [E]=UNSIGNED_MODULE23[ 7.453402] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab24[ 7.467144] Workqueue: events work_for_cpu_fn25[ 7.471472] pc 9000000001045fa4 ra ffff8000025331dc tp 90000001010c8000 sp 90000001010cb96026[ 7.479770] a0 900000012a3e8000 a1 900000010028c000 a2 000000000005d000 a3 000000000000000027[ 7.488069] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 000000000000000128[ 7.496367] t0 0000000000001000 t1 9000000001045000 t2 0000000000000000 t3 000000000000000029[ 7.504665] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 000000000000000030[ 7.504667] t8 0000000000000000 u0 90000000029ea7d8 s9 900000012a3e9360 s0 900000010028c00031[ 7.504668] s1 ffff800002744000 s2 0000000000000000 s3 0000000000000000 s4 000000000000000132[ 7.504669] s5 900000012a3e8000 s6 0000000000000001 s7 0000000000022022 s8 000000000000000033[ 7.537855] ra: ffff8000025331dc ___xe_bo_create_locked+0x158/0x3b0 [xe]34[ 7.544893] ERA: 9000000001045fa4 drm_gem_private_object_init+0xcc/0xd035[ 7.551639] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)36[ 7.557785] PRMD: 00000004 (PPLV0 +PIE -PWE)37[ 7.562111] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)38[ 7.566870] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)39[ 7.571628] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)40[ 7.577163] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)41[ 7.583128] Modules linked in: xe(E+) drm_gpuvm(E) drm_exec(E) drm_buddy(E) gpu_sched(E) drm_suballoc_helper(E) drm_display_helper(E) loongson(E) r8169(E) cec(E) rc_core(E) realtek(E) i2c_algo_bit(E) tpm_tis_spi(E) led_class(E) hid_generic(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) la_ow_syscall(E) i2c_dev(E)42[ 7.613049] Process kworker/0:4 (pid: 102, threadinfo=00000000bc26ebd1, task=0000000055480707)43[ 7.621606] Stack : 0000000000000000 3030303a6963702b 000000000005d000 000000000000000044[ 7.629563] 0000000000000001 0000000000000000 0000000000000000 8e1bfae42b2f787745[ 7.637519] 000000000005d000 900000012a3e8000 900000012a3e9360 000000000000000046[ 7.645475] ffffffffffffffff 0000000000000000 0000000000022022 000000000000000047[ 7.653431] 0000000000000001 ffff800002533660 0000000000022022 900000000023447048[ 7.661386] 90000001010cba28 0000000000001000 0000000000000000 000000000005c30049[ 7.669342] 900000012a3e8000 0000000000000000 0000000000000001 900000012a3e800050[ 7.677298] ffffffffffffffff 0000000000022022 900000012a3e9498 ffff800002533a1451[ 7.685254] 0000000000022022 0000000000000000 900000000209c000 90000000010589e052[ 7.693209] 90000001010cbab8 ffff8000027c78c0 fffffffffffff000 900000012a3e800053[ 7.701165] ...54[ 7.703588] Call Trace:55[ 7.703590] [<9000000001045fa4>] drm_gem_private_object_init+0xcc/0xd056[ 7.712496] [<ffff8000025331d8>] ___xe_bo_create_locked+0x154/0x3b0 [xe]57[ 7.719268] [<ffff80000253365c>] __xe_bo_create_locked+0x228/0x304 [xe]58[ 7.725951] [<ffff800002533a10>] xe_bo_create_pin_map_at_aligned+0x70/0x1b0 [xe]59[ 7.733410] [<ffff800002533c7c>] xe_managed_bo_create_pin_map+0x34/0xcc [xe]60[ 7.740522] [<ffff800002533d58>] xe_managed_bo_create_from_data+0x44/0xb0 [xe]61[ 7.747807] [<ffff80000258d19c>] xe_uc_fw_init+0x3ec/0x904 [xe]62[ 7.753814] [<ffff80000254a478>] xe_guc_init+0x30/0x3dc [xe]63[ 7.759553] [<ffff80000258bc04>] xe_uc_init+0x20/0xf0 [xe]64[ 7.765121] [<ffff800002542abc>] xe_gt_init_hwconfig+0x5c/0xd0 [xe]65[ 7.771461] [<ffff800002537204>] xe_device_probe+0x240/0x588 [xe]66[ 7.777627] [<ffff800002575448>] xe_pci_probe+0x6c0/0xa6c [xe]67[ 7.783540] [<9000000000e9828c>] local_pci_probe+0x4c/0xb468[ 7.788989] [<90000000002aa578>] work_for_cpu_fn+0x20/0x4069[ 7.794436] [<90000000002aeb50>] process_one_work+0x1a4/0x45870[ 7.800143] [<90000000002af5a0>] worker_thread+0x304/0x3fc71[ 7.805591] [<90000000002bacac>] kthread+0x114/0x13872[ 7.810520] [<9000000000241f64>] ret_from_kernel_thread+0x8/0xa473[ 7.816489]74[ 7.817961] Code: 4c000020 29c3e2f9 53ff93ff <002a0001> 0015002c 03400000 02ff8063 29c04077 001500f775[ 7.827651]76[ 7.829140] ---[ end trace 0000000000000000 ]---7778Revise all instances of `SZ_4K' with `PAGE_SIZE' and revise the call to79`drm_gem_private_object_init()' in `*___xe_bo_create_locked()' (last call80before BUG()) to use `size_t aligned_size' calculated from `PAGE_SIZE' to81fix the above error.8283Cc: stable@vger.kernel.org84Fixes: 4e03b584143e ("drm/xe/uapi: Reject bo creation of unaligned size")85Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")86Tested-by: Mingcong Bai <jeffbai@aosc.io>87Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>88Tested-by: Haien Liang <27873200@qq.com>89Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>90Tested-by: Shirong Liu <lsr1024@qq.com>91Tested-by: Haofeng Wu <s2600cw2@126.com>92Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f2822336093Link: https://t.me/c/1109254909/76855294Co-developed-by: Shang Yatsen <429839446@qq.com>95Signed-off-by: Shang Yatsen <429839446@qq.com>96Signed-off-by: Mingcong Bai <jeffbai@aosc.io>97---98 drivers/gpu/drm/xe/xe_bo.c | 6 +++---99 1 file changed, 3 insertions(+), 3 deletions(-)100101diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c102index d5b8332a04ec..0a6493cd17be 100644103--- a/drivers/gpu/drm/xe/xe_bo.c104+++ b/drivers/gpu/drm/xe/xe_bo.c105@@ -2122,9 +2122,9 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,106 flags |= XE_BO_FLAG_INTERNAL_64K;107 alignment = align >> PAGE_SHIFT;108 } else {109- aligned_size = ALIGN(size, SZ_4K);110+ aligned_size = ALIGN(size, PAGE_SIZE);111 flags &= ~XE_BO_FLAG_INTERNAL_64K;112- alignment = SZ_4K >> PAGE_SHIFT;113+ alignment = PAGE_SIZE >> PAGE_SHIFT;114 }115116 if (type == ttm_bo_type_device && aligned_size != size)117@@ -2148,7 +2148,7 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,118 #endif119 INIT_LIST_HEAD(&bo->vram_userfault_link);120121- drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);122+ drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);123124 if (resv) {125 ctx.allow_res_evict = !(flags & XE_BO_FLAG_NO_RESV_EVICT);126--1272.52.0128129130From e017f49e8ec6c346cc7734c2859ea8f1f3dd6be3 Mon Sep 17 00:00:00 2001131From: Mingcong Bai <jeffbai@aosc.io>132Date: Fri, 13 Jun 2025 09:11:30 +0800133Subject: [PATCH 2/6] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment134MIME-Version: 1.0135Content-Type: text/plain; charset=UTF-8136Content-Transfer-Encoding: 8bit137138Per the "Firmware" chapter in "drm/xe Intel GFX Driver", as well as139"Volume 8: Command Stream Programming" in "Intel® Arc™ A-Series Graphics140and Intel Data Center GPU Flex Series Open-Source Programmer's Reference141Manual For the discrete GPUs code named "Alchemist" and "Arctic Sound-M""142and "Intel® Iris® Xe MAX Graphics Open Source Programmer's Reference143Manual For the 2020 Discrete GPU formerly named "DG1"":144145 "The RINGBUF register sets (defined in Memory Interface Registers) are146 used to specify the ring buffer memory areas. The ring buffer must start147 on a 4KB boundary and be allocated in linear memory. The length of any148 one ring buffer is limited to 2MB."149150The Graphics micro (μ) Controller (GuC) really expects command buffers151aligned to 4KiB boundaries.152153Current implementation uses `PAGE_SIZE' as an assumed alignment reference154but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged155kernels, this causes driver failures after loading the GuC firmware:156157[ 7.398317] xe 0000:09:00.0: [drm] Found dg2/g10 (device ID 56a1) display version 13.00 stepping C0158[ 7.410429] xe 0000:09:00.0: [drm] Using GuC firmware from i915/dg2_guc_70.bin version 70.36.0159[ 10.719989] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status = 0x800001EC, time = 3297ms, freq = 2400MHz (req 2400MHz), done = 0160[ 10.732106] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status: Reset = 0, BootROM = 0x76, UKernel = 0x01, MIA = 0x00, Auth = 0x02161[ 10.744214] xe 0000:09:00.0: [drm] *ERROR* CRITICAL: Xe has declared device 0000:09:00.0 as wedged.162 Please file a _new_ bug report at https://gitlab.freedesktop.org/drm/xe/kernel/issues/new163[ 10.828908] xe 0000:09:00.0: [drm] *ERROR* GT0: GuC mmio request 0x4100: no reply 0x4100164165Correct this by defining `GUC_ALIGN' as `SZ_4K' in accordance with the166references above, and revising all instances of `PAGE_SIZE' as167`GUC_ALIGN'. Then, revise `PAGE_ALIGN()' calls as `ALIGN()' with168`GUC_ALIGN' as their second argument (overriding `PAGE_SIZE').169170Cc: stable@vger.kernel.org171Fixes: 84d15f426110 ("drm/xe/guc: Add capture size check in GuC log buffer")172Fixes: 9c8c7a7e6f1f ("drm/xe/guc: Prepare GuC register list and update ADS size for error capture")173Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")174Tested-by: Mingcong Bai <jeffbai@aosc.io>175Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>176Tested-by: Haien Liang <27873200@qq.com>177Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>178Tested-by: Shirong Liu <lsr1024@qq.com>179Tested-by: Haofeng Wu <s2600cw2@126.com>180Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360181Link: https://t.me/c/1109254909/768552182Co-developed-by: Shang Yatsen <429839446@qq.com>183Signed-off-by: Shang Yatsen <429839446@qq.com>184Signed-off-by: Mingcong Bai <jeffbai@aosc.io>185---186 drivers/gpu/drm/xe/xe_guc.c | 4 ++--187 drivers/gpu/drm/xe/xe_guc.h | 3 +++188 drivers/gpu/drm/xe/xe_guc_ads.c | 32 ++++++++++++++---------------189 drivers/gpu/drm/xe/xe_guc_capture.c | 8 ++++----190 drivers/gpu/drm/xe/xe_guc_ct.c | 2 +-191 drivers/gpu/drm/xe/xe_guc_log.c | 5 +++--192 drivers/gpu/drm/xe/xe_guc_pc.c | 4 ++--193 7 files changed, 31 insertions(+), 27 deletions(-)194195diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c196index 00789844ea4d..67ddea27d4ec 100644197--- a/drivers/gpu/drm/xe/xe_guc.c198+++ b/drivers/gpu/drm/xe/xe_guc.c199@@ -95,7 +95,7 @@ static u32 guc_ctl_feature_flags(struct xe_guc *guc)200201 static u32 guc_ctl_log_params_flags(struct xe_guc *guc)202 {203- u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT;204+ u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> XE_PTE_SHIFT;205 u32 flags;206207 #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0)208@@ -140,7 +140,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)209210 static u32 guc_ctl_ads_flags(struct xe_guc *guc)211 {212- u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT;213+ u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> XE_PTE_SHIFT;214 u32 flags = FIELD_PREP(GUC_ADS_ADDR, ads);215216 return flags;217diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h218index 1cca05967e62..d2f87b8a6447 100644219--- a/drivers/gpu/drm/xe/xe_guc.h220+++ b/drivers/gpu/drm/xe/xe_guc.h221@@ -23,6 +23,9 @@222 #define GUC_FIRMWARE_VER(guc) \223 MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE])224225+/* GuC really expects command buffers aligned to 4K boundaries. */226+#define GUC_ALIGN SZ_4K227+228 struct drm_printer;229230 void xe_guc_comm_init_early(struct xe_guc *guc);231diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c232index 58e0b0294a5b..5722ef9c4529 100644233--- a/drivers/gpu/drm/xe/xe_guc_ads.c234+++ b/drivers/gpu/drm/xe/xe_guc_ads.c235@@ -144,17 +144,17 @@ static size_t guc_ads_regset_size(struct xe_guc_ads *ads)236237 static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads)238 {239- return PAGE_ALIGN(ads->golden_lrc_size);240+ return ALIGN(ads->golden_lrc_size, GUC_ALIGN);241 }242243 static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)244 {245- return PAGE_ALIGN(ads->ads_waklv_size);246+ return ALIGN(ads->ads_waklv_size, GUC_ALIGN);247 }248249 static size_t guc_ads_capture_size(struct xe_guc_ads *ads)250 {251- return PAGE_ALIGN(ads->capture_size);252+ return ALIGN(ads->capture_size, GUC_ALIGN);253 }254255 static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)256@@ -169,7 +169,7 @@ static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)257258 static size_t guc_ads_private_data_size(struct xe_guc_ads *ads)259 {260- return PAGE_ALIGN(ads_to_guc(ads)->fw.private_data_size);261+ return ALIGN(ads_to_guc(ads)->fw.private_data_size, GUC_ALIGN);262 }263264 static size_t guc_ads_regset_offset(struct xe_guc_ads *ads)265@@ -184,7 +184,7 @@ static size_t guc_ads_golden_lrc_offset(struct xe_guc_ads *ads)266 offset = guc_ads_regset_offset(ads) +267 guc_ads_regset_size(ads);268269- return PAGE_ALIGN(offset);270+ return ALIGN(offset, GUC_ALIGN);271 }272273 static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)274@@ -194,7 +194,7 @@ static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)275 offset = guc_ads_golden_lrc_offset(ads) +276 guc_ads_golden_lrc_size(ads);277278- return PAGE_ALIGN(offset);279+ return ALIGN(offset, GUC_ALIGN);280 }281282 static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)283@@ -204,7 +204,7 @@ static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)284 offset = guc_ads_waklv_offset(ads) +285 guc_ads_waklv_size(ads);286287- return PAGE_ALIGN(offset);288+ return ALIGN(offset, GUC_ALIGN);289 }290291 static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)292@@ -214,7 +214,7 @@ static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)293 offset = guc_ads_capture_offset(ads) +294 guc_ads_capture_size(ads);295296- return PAGE_ALIGN(offset);297+ return ALIGN(offset, GUC_ALIGN);298 }299300 static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)301@@ -224,7 +224,7 @@ static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)302 offset = guc_ads_um_queues_offset(ads) +303 guc_ads_um_queues_size(ads);304305- return PAGE_ALIGN(offset);306+ return ALIGN(offset, GUC_ALIGN);307 }308309 static size_t guc_ads_size(struct xe_guc_ads *ads)310@@ -277,7 +277,7 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)311 continue;312313 real_size = xe_gt_lrc_size(gt, class);314- alloc_size = PAGE_ALIGN(real_size);315+ alloc_size = ALIGN(real_size, GUC_ALIGN);316 total_size += alloc_size;317 }318319@@ -628,12 +628,12 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)320 offsetof(struct __guc_ads_blob, system_info));321322 /* first, set aside the first page for a capture_list with zero descriptors */323- total_size = PAGE_SIZE;324+ total_size = GUC_ALIGN;325 if (!xe_guc_capture_getnullheader(guc, &ptr, &size))326 xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr, size);327328 null_ggtt = ads_ggtt + capture_offset;329- capture_offset += PAGE_SIZE;330+ capture_offset += GUC_ALIGN;331332 /*333 * Populate capture list : at this point adps is already allocated and334@@ -697,10 +697,10 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)335 }336 }337338- if (ads->capture_size != PAGE_ALIGN(total_size))339+ if (ads->capture_size != ALIGN(total_size, GUC_ALIGN))340 xe_gt_dbg(gt, "Updated ADS capture size %d (was %d)\n",341- PAGE_ALIGN(total_size), ads->capture_size);342- return PAGE_ALIGN(total_size);343+ ALIGN(total_size, GUC_ALIGN), ads->capture_size);344+ return ALIGN(total_size, GUC_ALIGN);345 }346347 static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,348@@ -948,7 +948,7 @@ static void guc_golden_lrc_populate(struct xe_guc_ads *ads)349 xe_gt_assert(gt, gt->default_lrc[class]);350351 real_size = xe_gt_lrc_size(gt, class);352- alloc_size = PAGE_ALIGN(real_size);353+ alloc_size = ALIGN(real_size, GUC_ALIGN);354 total_size += alloc_size;355356 xe_map_memcpy_to(xe, ads_to_map(ads), offset,357diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c358index 243dad3e2418..41dbfa4edda7 100644359--- a/drivers/gpu/drm/xe/xe_guc_capture.c360+++ b/drivers/gpu/drm/xe/xe_guc_capture.c361@@ -591,8 +591,8 @@ guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,362 return -ENODATA;363364 if (size)365- *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +366- (num_regs * sizeof(struct guc_mmio_reg)));367+ *size = ALIGN((sizeof(struct guc_debug_capture_list)) +368+ (num_regs * sizeof(struct guc_mmio_reg)), GUC_ALIGN);369370 return 0;371 }372@@ -739,7 +739,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)373 * sequence, that is, during the pre-hwconfig phase before we have374 * the exact engine fusing info.375 */376- total_size = PAGE_SIZE; /* Pad a page in front for empty lists */377+ total_size = GUC_ALIGN; /* Pad a page in front for empty lists */378 for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {379 for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {380 if (xe_guc_capture_getlistsize(guc, i,381@@ -759,7 +759,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)382 total_size += global_size;383 }384385- return PAGE_ALIGN(total_size);386+ return ALIGN(total_size, GUC_ALIGN);387 }388389 static int guc_capture_output_size_est(struct xe_guc *guc)390diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c391index 3aac1a7aa2e7..16527051b35a 100644392--- a/drivers/gpu/drm/xe/xe_guc_ct.c393+++ b/drivers/gpu/drm/xe/xe_guc_ct.c394@@ -226,7 +226,7 @@ int xe_guc_ct_init_noalloc(struct xe_guc_ct *ct)395 struct xe_gt *gt = ct_to_gt(ct);396 int err;397398- xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));399+ xe_gt_assert(gt, !(guc_ct_size() % GUC_ALIGN));400401 err = drmm_mutex_init(&xe->drm, &ct->lock);402 if (err)403diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c404index c01ccb35dc75..becf74a28d90 100644405--- a/drivers/gpu/drm/xe/xe_guc_log.c406+++ b/drivers/gpu/drm/xe/xe_guc_log.c407@@ -15,6 +15,7 @@408 #include "xe_force_wake.h"409 #include "xe_gt.h"410 #include "xe_gt_printk.h"411+#include "xe_guc.h"412 #include "xe_map.h"413 #include "xe_mmio.h"414 #include "xe_module.h"415@@ -58,7 +59,7 @@ static size_t guc_log_size(void)416 * | Capture logs |417 * +===============================+ + CAPTURE_SIZE418 */419- return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +420+ return GUC_ALIGN + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +421 CAPTURE_BUFFER_SIZE;422 }423424@@ -328,7 +329,7 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type425 u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type)426 {427 enum guc_log_buffer_type i;428- u32 offset = PAGE_SIZE;/* for the log_buffer_states */429+ u32 offset = GUC_ALIGN; /* for the log_buffer_states */430431 for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) {432 if (i == type)433diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c434index 53fdf59524c4..64e13db21dfe 100644435--- a/drivers/gpu/drm/xe/xe_guc_pc.c436+++ b/drivers/gpu/drm/xe/xe_guc_pc.c437@@ -1239,7 +1239,7 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)438 {439 struct xe_device *xe = pc_to_xe(pc);440 struct xe_gt *gt = pc_to_gt(pc);441- u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));442+ u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);443 unsigned int fw_ref;444 ktime_t earlier;445 int ret;446@@ -1372,7 +1372,7 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)447 struct xe_tile *tile = gt_to_tile(gt);448 struct xe_device *xe = gt_to_xe(gt);449 struct xe_bo *bo;450- u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));451+ u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);452 int err;453454 if (xe->info.skip_guc_pc)455--4562.52.0457458459From b3e2f05fd0c5ce106180df05cbfa566ea77738dc Mon Sep 17 00:00:00 2001460From: Mingcong Bai <jeffbai@aosc.io>461Date: Fri, 13 Jun 2025 09:11:31 +0800462Subject: [PATCH 3/6] drm/xe/regs: fix RING_CTL_SIZE(size) calculation463464Similar to the preceding patch for GuC (and with the same references),465Intel GPUs expects command buffers to align to 4KiB boundaries.466467Current code uses `PAGE_SIZE' as an assumed alignment reference but 4KiB468kernel page sizes is by no means a guarantee. On 16KiB-paged kernels, this469causes driver failures during boot up:470471[ 14.018975] ------------[ cut here ]------------472[ 14.023562] xe 0000:09:00.0: [drm] GT0: Kernel-submitted job timed out473[ 14.030084] WARNING: CPU: 3 PID: 564 at drivers/gpu/drm/xe/xe_guc_submit.c:1181 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]474[ 14.041300] Modules linked in: nf_conntrack_netbios_ns(E) nf_conntrack_broadcast(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) rfkill(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) snd_hda_codec_conexant(E) snd_hda_codec_generic(E) snd_hda_codec_hdmi(E) nls_iso8859_1(E) snd_hda_intel(E) snd_intel_dspcfg(E) qrtr(E) nls_cp437(E) snd_hda_codec(E) spi_loongson_pci(E) rtc_efi(E) snd_hda_core(E) loongson3_cpufreq(E) spi_loongson_core(E) snd_hwdep(E) snd_pcm(E) snd_timer(E) snd(E) soundcore(E) gpio_loongson_64bit(E) input_leds(E) rtc_loongson(E) i2c_ls2x(E) mousedev(E) sch_fq_codel(E) fuse(E) nfnetlink(E) dmi_sysfs(E) ip_tables(E) x_tables(E) xe(E) d475 rm_gpuvm(E) drm_buddy(E) gpu_sched(E)476[ 14.041369] drm_exec(E) drm_suballoc_helper(E) drm_display_helper(E) cec(E) rc_core(E) hid_generic(E) tpm_tis_spi(E) r8169(E) realtek(E) led_class(E) loongson(E) i2c_algo_bit(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) i2c_dev(E)477[ 14.153910] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7478[ 14.165325] Tainted: [E]=UNSIGNED_MODULE479[ 14.169220] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab480[ 14.182970] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]481[ 14.189549] pc ffff8000024f3760 ra ffff8000024f3760 tp 900000012f150000 sp 900000012f153ca0482[ 14.197853] a0 0000000000000000 a1 0000000000000000 a2 0000000000000000 a3 0000000000000000483[ 14.206156] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 0000000000000000484[ 14.214458] t0 0000000000000000 t1 0000000000000000 t2 0000000000000000 t3 0000000000000000485[ 14.222761] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 0000000000000000486[ 14.231064] t8 0000000000000000 u0 900000000195c0c8 s9 900000012e4dcf48 s0 90000001285f3640487[ 14.239368] s1 90000001004f8000 s2 ffff8000026ec000 s3 0000000000000000 s4 900000012e4dc028488[ 14.247672] s5 90000001009f5e00 s6 000000000000137e s7 0000000000000001 s8 900000012f153ce8489[ 14.255975] ra: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]490[ 14.263379] ERA: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]491[ 14.270777] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)492[ 14.276927] PRMD: 00000004 (PPLV0 +PIE -PWE)493[ 14.281258] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)494[ 14.286024] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)495[ 14.290790] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)496[ 14.296329] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)497[ 14.302299] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7498[ 14.302302] Tainted: [E]=UNSIGNED_MODULE499[ 14.302302] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab500[ 14.302304] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]501[ 14.302307] Stack : 900000012f153928 d84a6232d48f1ac7 900000000023eb34 900000012f150000502[ 14.302310] 900000012f153900 0000000000000000 900000012f153908 9000000001c31c70503[ 14.302313] 0000000000000000 0000000000000000 0000000000000000 0000000000000000504[ 14.302315] 0000000000000000 d84a6232d48f1ac7 0000000000000000 0000000000000000505[ 14.302318] 0000000000000000 0000000000000000 0000000000000000 0000000000000000506[ 14.302320] 0000000000000000 0000000000000000 00000000072b4000 900000012e4dcf48507[ 14.302323] 9000000001eb8000 0000000000000000 9000000001c31c70 0000000000000004508[ 14.302325] 0000000000000004 0000000000000000 000000000000137e 0000000000000001509[ 14.302328] 900000012f153ce8 9000000001c31c70 9000000000244174 0000555581840b98510[ 14.302331] 00000000000000b0 0000000000000004 0000000000000000 0000000000071c1d511[ 14.302333] ...512[ 14.302335] Call Trace:513[ 14.302336] [<9000000000244174>] show_stack+0x3c/0x16c514[ 14.302341] [<900000000023eb30>] dump_stack_lvl+0x84/0xe0515[ 14.302346] [<9000000000288208>] __warn+0x8c/0x174516[ 14.302350] [<90000000017c1918>] report_bug+0x1c0/0x22c517[ 14.302354] [<90000000017f66e8>] do_bp+0x280/0x344518[ 14.302359]519[ 14.302360] ---[ end trace 0000000000000000 ]---520521Revise calculation of `RING_CTL_SIZE(size)' to use `SZ_4K' to fix the522aforementioned issue.523524Cc: stable@vger.kernel.org525Fixes: b79e8fd954c4 ("drm/xe: Remove dependency on intel_engine_regs.h")526Tested-by: Mingcong Bai <jeffbai@aosc.io>527Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>528Tested-by: Haien Liang <27873200@qq.com>529Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>530Tested-by: Shirong Liu <lsr1024@qq.com>531Tested-by: Haofeng Wu <s2600cw2@126.com>532Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360533Link: https://t.me/c/1109254909/768552534Co-developed-by: Shang Yatsen <429839446@qq.com>535Signed-off-by: Shang Yatsen <429839446@qq.com>536Signed-off-by: Mingcong Bai <jeffbai@aosc.io>537---538 drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-539 1 file changed, 1 insertion(+), 1 deletion(-)540541diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h542index f4c3e1187a00..5b978ad19663 100644543--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h544+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h545@@ -56,7 +56,7 @@546 #define RING_START(base) XE_REG((base) + 0x38)547548 #define RING_CTL(base) XE_REG((base) + 0x3c)549-#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */550+#define RING_CTL_SIZE(size) ((size) - SZ_4K) /* in bytes -> pages */551552 #define RING_START_UDW(base) XE_REG((base) + 0x48)553554--5552.52.0556557558From df33d190df31530b80064fe9feb5413fadfd57ea Mon Sep 17 00:00:00 2001559From: Mingcong Bai <jeffbai@aosc.io>560Date: Fri, 13 Jun 2025 09:11:32 +0800561Subject: [PATCH 4/6] drm/xe: use 4KiB alignment for cursor jumps562563It appears that the xe_res_cursor also assumes 4KiB alignment.564565Current implementation uses `PAGE_SIZE' as an assumed alignment reference,566but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged567kernels, this causes driver failures during boot up:568569[ 23.242757] ------------[ cut here ]------------570[ 23.247363] WARNING: CPU: 0 PID: 2036 at drivers/gpu/drm/xe/xe_res_cursor.h:182 emit_pte+0x394/0x3b0 [xe]571[ 23.256962] Modules linked in: nf_conntrack_netbios_ns(E) nf_conntrack_broadcast(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) rfkill(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) snd_hda_codec_conexant(E) snd_hda_codec_generic(E) snd_hda_codec_hdmi(E) snd_hda_intel(E) snd_intel_dspcfg(E) snd_hda_codec(E) nls_iso8859_1(E) qrtr(E) nls_cp437(E) snd_hda_core(E) loongson3_cpufreq(E) rtc_efi(E) snd_hwdep(E) snd_pcm(E) spi_loongson_pci(E) snd_timer(E) snd(E) spi_loongson_core(E) soundcore(E) gpio_loongson_64bit(E) rtc_loongson(E) i2c_ls2x(E) mousedev(E) input_leds(E) sch_fq_codel(E) fuse(E) nfnetlink(E) dmi_sysfs(E) ip_tables(E) x_tables(E) xe(E) d572 rm_gpuvm(E) drm_buddy(E) gpu_sched(E)573[ 23.257034] drm_exec(E) drm_suballoc_helper(E) drm_display_helper(E) cec(E) rc_core(E) hid_generic(E) tpm_tis_spi(E) r8169(E) loongson(E) i2c_algo_bit(E) realtek(E) drm_ttm_helper(E) led_class(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) i2c_dev(E)574[ 23.369697] CPU: 0 UID: 1000 PID: 2036 Comm: QSGRenderThread Tainted: G E 6.14.0-rc4-aosc-main-g7cc07e6e50b0-dirty #8575[ 23.381640] Tainted: [E]=UNSIGNED_MODULE576[ 23.385534] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab577[ 23.399319] pc ffff80000251efc0 ra ffff80000251eddc tp 900000011fe3c000 sp 900000011fe3f7e0578[ 23.407632] a0 0000000000000001 a1 0000000000000000 a2 0000000000000000 a3 0000000000000000579[ 23.415938] a4 0000000000000000 a5 0000000000000000 a6 0000000000060000 a7 900000010c947b00580[ 23.424240] t0 0000000000000000 t1 0000000000000000 t2 0000000000000000 t3 900000012e456230581[ 23.432543] t4 0000000000000035 t5 0000000000004000 t6 00000001fbc40403 t7 0000000000004000582[ 23.440845] t8 9000000100e688a8 u0 5cc06cee8ef0edee s9 9000000100024420 s0 0000000000000047583[ 23.449147] s1 0000000000004000 s2 0000000000000001 s3 900000012adba000 s4 ffffffffffffc000584[ 23.457450] s5 9000000108939428 s6 0000000000000000 s7 0000000000000000 s8 900000011fe3f8e0585[ 23.465851] ra: ffff80000251eddc emit_pte+0x1b0/0x3b0 [xe]586[ 23.471761] ERA: ffff80000251efc0 emit_pte+0x394/0x3b0 [xe]587[ 23.477557] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)588[ 23.483732] PRMD: 00000004 (PPLV0 +PIE -PWE)589[ 23.488068] EUEN: 00000003 (+FPE +SXE -ASXE -BTE)590[ 23.492832] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)591[ 23.497594] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)592[ 23.503133] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)593[ 23.509164] CPU: 0 UID: 1000 PID: 2036 Comm: QSGRenderThread Tainted: G E 6.14.0-rc4-aosc-main-g7cc07e6e50b0-dirty #8594[ 23.509168] Tainted: [E]=UNSIGNED_MODULE595[ 23.509168] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab596[ 23.509170] Stack : ffffffffffffffff ffffffffffffffff 900000000023eb34 900000011fe3c000597[ 23.509176] 900000011fe3f440 0000000000000000 900000011fe3f448 9000000001c31c70598[ 23.509181] 0000000000000000 0000000000000000 0000000000000000 0000000000000000599[ 23.509185] 0000000000000000 5cc06cee8ef0edee 0000000000000000 0000000000000000600[ 23.509190] 0000000000000000 0000000000000000 0000000000000000 0000000000000000601[ 23.509193] 0000000000000000 0000000000000000 00000000066b4000 9000000100024420602[ 23.509197] 9000000001eb8000 0000000000000000 9000000001c31c70 0000000000000004603[ 23.509202] 0000000000000004 0000000000000000 0000000000000000 0000000000000000604[ 23.509206] 900000011fe3f8e0 9000000001c31c70 9000000000244174 00007fffac097534605[ 23.509211] 00000000000000b0 0000000000000004 0000000000000003 0000000000071c1d606[ 23.509216] ...607[ 23.509218] Call Trace:608[ 23.509220] [<9000000000244174>] show_stack+0x3c/0x16c609[ 23.509226] [<900000000023eb30>] dump_stack_lvl+0x84/0xe0610[ 23.509230] [<9000000000288208>] __warn+0x8c/0x174611[ 23.509234] [<90000000017c1918>] report_bug+0x1c0/0x22c612[ 23.509238] [<90000000017f66e8>] do_bp+0x280/0x344613[ 23.509243] [<90000000002428a0>] handle_bp+0x120/0x1c0614[ 23.509247] [<ffff80000251efc0>] emit_pte+0x394/0x3b0 [xe]615[ 23.509295] [<ffff800002520d38>] xe_migrate_clear+0x2d8/0xa54 [xe]616[ 23.509341] [<ffff8000024e6c38>] xe_bo_move+0x324/0x930 [xe]617[ 23.509387] [<ffff800002209468>] ttm_bo_handle_move_mem+0xd0/0x194 [ttm]618[ 23.509392] [<ffff800002209ebc>] ttm_bo_validate+0xd4/0x1cc [ttm]619[ 23.509396] [<ffff80000220a138>] ttm_bo_init_reserved+0x184/0x1dc [ttm]620[ 23.509399] [<ffff8000024e7840>] ___xe_bo_create_locked+0x1e8/0x3d4 [xe]621[ 23.509445] [<ffff8000024e7cf8>] __xe_bo_create_locked+0x2cc/0x390 [xe]622[ 23.509489] [<ffff8000024e7e98>] xe_bo_create_user+0x34/0xe4 [xe]623[ 23.509533] [<ffff8000024e875c>] xe_gem_create_ioctl+0x154/0x4d8 [xe]624[ 23.509578] [<9000000001062784>] drm_ioctl_kernel+0xe0/0x14c625[ 23.509582] [<9000000001062c10>] drm_ioctl+0x420/0x5f4626[ 23.509585] [<ffff8000024ea778>] xe_drm_ioctl+0x64/0xac [xe]627[ 23.509630] [<9000000000653504>] sys_ioctl+0x2b8/0xf98628[ 23.509634] [<90000000017f684c>] do_syscall+0xa0/0x140629[ 23.509637] [<9000000000241e38>] handle_syscall+0xb8/0x158630[ 23.509640]631[ 23.509644] ---[ end trace 0000000000000000 ]---632633Revise calls to `xe_res_dma()' and `xe_res_cursor()' to use634`XE_PTE_MASK' (12) and `SZ_4K' to fix this potentially confused use of635`PAGE_SIZE' in relevant code.636637Cc: stable@vger.kernel.org638Fixes: e89b384cde62 ("drm/xe/migrate: Update emit_pte to cope with a size level than 4k")639Tested-by: Mingcong Bai <jeffbai@aosc.io>640Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>641Tested-by: Haien Liang <27873200@qq.com>642Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>643Tested-by: Shirong Liu <lsr1024@qq.com>644Tested-by: Haofeng Wu <s2600cw2@126.com>645Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360646Link: https://t.me/c/1109254909/768552647Co-developed-by: Shang Yatsen <429839446@qq.com>648Signed-off-by: Shang Yatsen <429839446@qq.com>649Signed-off-by: Mingcong Bai <jeffbai@aosc.io>650---651 drivers/gpu/drm/xe/xe_migrate.c | 4 ++--652 1 file changed, 2 insertions(+), 2 deletions(-)653654diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c655index 3acdcbf41887..0e59e2f60f3f 100644656--- a/drivers/gpu/drm/xe/xe_migrate.c657+++ b/drivers/gpu/drm/xe/xe_migrate.c658@@ -617,7 +617,7 @@ static void emit_pte(struct xe_migrate *m,659 u64 addr, flags = 0;660 bool devmem = false;661662- addr = xe_res_dma(cur) & PAGE_MASK;663+ addr = xe_res_dma(cur) & ~XE_PTE_MASK;664 if (is_vram) {665 if (vm->flags & XE_VM_FLAG_64K) {666 u64 va = cur_ofs * XE_PAGE_SIZE / 8;667@@ -638,7 +638,7 @@ static void emit_pte(struct xe_migrate *m,668 bb->cs[bb->len++] = lower_32_bits(addr);669 bb->cs[bb->len++] = upper_32_bits(addr);670671- xe_res_next(cur, min_t(u32, size, PAGE_SIZE));672+ xe_res_next(cur, min_t(u32, size, XE_PAGE_SIZE));673 cur_ofs += 8;674 }675 }676--6772.52.0678679680From d1adfd42ec11a13cf737336a6ee601cf569c21e8 Mon Sep 17 00:00:00 2001681From: Mingcong Bai <jeffbai@aosc.io>682Date: Fri, 13 Jun 2025 09:11:33 +0800683Subject: [PATCH 5/6] drm/xe/query: use PAGE_SIZE as the minimum page alignment684685As this component hooks into userspace API, it should be assumed that it686will play well with non-4KiB/64KiB pages.687688Use `PAGE_SIZE' as the final reference for page alignment instead.689690Cc: stable@vger.kernel.org691Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")692Fixes: 801989b08aff ("drm/xe/uapi: Make constant comments visible in kernel doc")693Tested-by: Mingcong Bai <jeffbai@aosc.io>694Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>695Tested-by: Haien Liang <27873200@qq.com>696Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>697Tested-by: Shirong Liu <lsr1024@qq.com>698Tested-by: Haofeng Wu <s2600cw2@126.com>699Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360700Link: https://t.me/c/1109254909/768552701Co-developed-by: Shang Yatsen <429839446@qq.com>702Signed-off-by: Shang Yatsen <429839446@qq.com>703Signed-off-by: Mingcong Bai <jeffbai@aosc.io>704---705 drivers/gpu/drm/xe/xe_query.c | 2 +-706 include/uapi/drm/xe_drm.h | 7 +++++--707 2 files changed, 6 insertions(+), 3 deletions(-)708709diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c710index 2e9ff33ed2fe..70b1b370459c 100644711--- a/drivers/gpu/drm/xe/xe_query.c712+++ b/drivers/gpu/drm/xe/xe_query.c713@@ -345,7 +345,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)714 config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=715 DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;716 config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =717- xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;718+ xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE;719 config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;720 config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =721 xe_exec_queue_device_get_max_priority(xe);722diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h723index 400555a8af18..388e751ffd51 100644724--- a/include/uapi/drm/xe_drm.h725+++ b/include/uapi/drm/xe_drm.h726@@ -403,8 +403,11 @@ struct drm_xe_query_mem_regions {727 * has low latency hint support728 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the729 * device has CPU address mirroring support730- * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment731- * required by this device, typically SZ_4K or SZ_64K732+ * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment required733+ * by this device and the CPU. The minimum page size for the device is734+ * usually SZ_4K or SZ_64K, while for the CPU, it is PAGE_SIZE. This value735+ * is calculated by max(min_gpu_page_size, PAGE_SIZE). This alignment is736+ * enforced on buffer object allocations and VM binds.737 * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address738 * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest739 * available exec queue priority740--7412.52.0742743744From 02737e22fadee53c91056d04e15ca24e709a7ddd Mon Sep 17 00:00:00 2001745From: Linsen Zhou <i@lin.moe>746Date: Fri, 23 Jan 2026 17:23:52 +0800747Subject: [PATCH 6/6] drm/xe: re-enable for non-4k page size748749---750 drivers/gpu/drm/xe/Kconfig | 1 -751 1 file changed, 1 deletion(-)752753diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig754index 4b288eb3f5b0..995603d7633b 100644755--- a/drivers/gpu/drm/xe/Kconfig756+++ b/drivers/gpu/drm/xe/Kconfig757@@ -5,7 +5,6 @@ config DRM_XE758 depends on KUNIT || !KUNIT759 depends on INTEL_VSEC || !INTEL_VSEC760 depends on X86_PLATFORM_DEVICES || !(X86 && ACPI)761- depends on PAGE_SIZE_4KB || COMPILE_TEST || BROKEN762 select INTERVAL_TREE763 # we need shmfs for the swappable backing store, and in particular764 # the shmem_readpage() which depends upon tmpfs765--7662.52.0767